By Vojkan Vidojkovic, J. van der Tang, Arjan Leeuwenburgh, Arthur H.M. van Roermund
This ebook investigates ideas, advantages, boundaries, and prices linked to multi-standard operation of RF front-ends and their skill to conform to variable radio environments. subsequent, it highlights the optimization of RF front-ends to permit greatest functionality inside a undeniable strength finances, whereas focusing on complete integration. ultimately, the booklet investigates percentages for low-voltage, low-power circuit topologies in CMOS expertise.
Read or Download Adaptive Multi-Standard RF Front-Ends (Analog Circuits and Signal Processing) PDF
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Additional resources for Adaptive Multi-Standard RF Front-Ends (Analog Circuits and Signal Processing)
This chapter is organized as follows. 1, a generic front-end architecture is systematically synthesized. 2. 4. 5. 17 18 CHAPTER 2. 2 shows the steps that are followed in order to synthesize a generic front-end architecture. As mentioned, the first step in the synthesis of a generic front-end architecture is to find a set of functions, which front-end has to perform. Next, it is important to assign a building block to each front-end function. In this way, a set of building blocks is obtained. A generic front-end architecture can be synthesized by connecting these building blocks in a specific order.
They suppress high frequency components after the frequency downconversion and reduce DR that has to be handled by the ADCs. Using two LPFs instead of an IFCF is advantageous. In general, they should occupy less chip area and consume less power than an IFCF. A high level of integration and digitization are properties typical for the zero-IF architecture. A high level of digitization makes zero-IF architecture suitable for application in multi-standard front-end and for implementation in deep-submicron CMOS processes.
The level of the strongest out-of band interferer (Pmax,int ) is −13 dBm . 1) DRfe = Pmax,int − Psens Hence, for the DECT system the DR is 77 dB. 2) Pqn is the level of the ADC quantization noise. Pqn has to be sufficiently low in order to prevent deterioration of SNR at the ADC output. When a signal with a level equal to the sensitivity level is processed by a front-end, Pqn has to be 20 dB lower than Psens . This gives a total DRadc of 97 dB. 3) fsam is the sampling frequency, while fsig is the carrier frequency.